如何在ARM处理器上检测冷启动与热启动？

Question

我正在寻找一种方法来确定ARM处理器是从冷启动(即初始上电)到热启动(即没有实际功率损耗的复位断言)启动.具体来说,我正在使用ARM968内核,将使用C或汇编进行确定,我将使用该确定,因此某些操作仅在初始上电时运行,而不是在后续复位时运行.在之前的项目中,我利用外部电路(例如FPGA)来检测不同的启动方案,但在这种情况下,我仅限于ARM内核.

Answer 1

检查特定芯片的文档("ARM968"不够具体).应该有一个描述复位原因的寄存器.例如,这是LPC23xx的含义:

Reset Source Identification Register (RSIR - 0xE01FC180)

This register contains one bit for each source of Reset. Writing a 1 to any of these bits
clears the corresponding read-side bit to 0. The interactions among the four sources are
described below.

Bit Symbol Description
0 POR Assertion of the POR signal sets this bit, and clears all of the other bits in
this register. But if another Reset signal (e.g., External Reset) remains
asserted after the POR signal is negated, then its bit is set. This bit is not
affected by any of the other sources of Reset.
1 EXTR Assertion of the RESET signal sets this bit. This bit is cleared by POR,
but is not affected by WDT or BOD reset.
2 WDTR This bit is set when the Watchdog Timer times out and the WDTRESET
bit in the Watchdog Mode Register is 1. It is cleared by any of the other
sources of Reset.
3 BODR This bit is set when the 3.3 V power reaches a level below 2.6 V.
If the VDD(DCDC)(3V3) voltage dips from 3.3 V to 2.5 V and backs up, the
BODR bit will be set to 1.
If the VDD(DCDC)(3V3) voltage dips from 3.3 V to 2.5 V and continues to
decline to the level at which POR is asserted (nominally 1 V), the BODR
bit is cleared.
if the VDD(DCDC)(3V3) voltage rises continuously from below 1 V to a level
above 2.6 V, the BODR will be set to 1.
This bit is not affected by External Reset nor Watchdog Reset.
Note: Only in case when a reset occurs and the POR = 0, the BODR bit
indicates if the VDD(DCDC)(3V3) voltage was below 2.6 V or not.

Answer 2

您可以将RAM中的全局变量初始化为在冷启动期间不太可能发生的值,并在引导期间检查该值.

对于微控制器,通常特定芯片的复位逻辑提供状态寄存器,该寄存器指示复位源.我不知道这个更大的核心是否存在,以及你是否可以使用它.