Cos*_*tas 27
如果您已lshw安装：
$ sudo lshw -C memory
$ sudo lshw -C memory
...
*-cache:0
description: L1 cache
physical id: a
slot: Internal L1 Cache
size: 32KiB
capacity: 32KiB
capabilities: asynchronous internal write-through data
*-cache:1
description: L2 cache
physical id: b
slot: Internal L2 Cache
size: 256KiB
capacity: 256KiB
capabilities: burst internal write-through unified
*-cache:2
description: L3 cache
physical id: c
slot: Internal L3 Cache
size: 3MiB
capacity: 8MiB
capabilities: burst internal write-back
*-memory
description: System Memory
physical id: 2a
slot: System board or motherboard
size: 8GiB
*-bank:0
description: SODIMM DDR3 Synchronous 1334 MHz (0.7 ns)
product: M471B5273CH0-CH9
vendor: Samsung
physical id: 0
serial: 67010644
slot: DIMM 1
size: 4GiB
width: 64 bits
clock: 1334MHz (0.7ns)
*-bank:1
description: SODIMM DDR3 Synchronous 1334 MHz (0.7 ns)
product: 16JTF51264HZ-1G4H1
vendor: Micron Technology
physical id: 1
serial: 3749C127
slot: DIMM 2
size: 4GiB
width: 64 bits
clock: 1334MHz (0.7ns)
Mir*_*anc 25
如果您只关心尺寸，请尝试lscpu从util-linux.
$ lscpu
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 4
On-line CPU(s) list: 0-3
Thread(s) per core: 2
Core(s) per socket: 2
Socket(s): 1
NUMA node(s): 1
Vendor ID: GenuineIntel
CPU family: 6
Model: 37
Model name: Intel(R) Core(TM) i5 CPU M 560 @ 2.67GHz
Stepping: 5
CPU MHz: 1199.000
BogoMIPS: 5319.88
Virtualization: VT-x
L1d cache: 32K
L1i cache: 32K
L2 cache: 256K
L3 cache: 3072K
NUMA node0 CPU(s): 0-3
还应该有名为 x86info 的包/命令。假设您有 i386/x86_64，x86info -c应该提供有关缓存的更多详细信息。
$ x86info -c
x86info v1.30. Dave Jones 2001-2011
Feedback to <davej@redhat.com>.
Found 4 identical CPUs
Extended Family: 0 Extended Model: 2 Family: 6 Model: 37 Stepping: 5
Type: 0 (Original OEM)
CPU Model (x86info's best guess): Core i7 (Nehalem) [Clarkdale/Arrandale]
Processor name string (BIOS programmed): Intel(R) Core(TM) i5 CPU M 560 @ 2.67GHz
Cache info
L1 Instruction cache: 32KB, 4-way associative. 64 byte line size.
L1 Data cache: 32KB, 8-way associative. 64 byte line size.
L2 (MLC): 256KB, 8-way associative. 64 byte line size.
TLB info
Instruction TLB: 2MB or 4MB pages, fully associative, 7 entries
Instruction TLB: 4K pages, 4-way associative, 64 entries.
Data TLB: 4KB or 4MB pages, fully associative, 32 entries.
Data TLB: 4KB pages, 4-way associative, 64 entries
Data TLB: 4K pages, 4-way associative, 512 entries.
Data TLB: 4KB or 4MB pages, fully associative, 32 entries.
Data TLB: 4KB pages, 4-way associative, 64 entries
64 byte prefetching.
Data TLB: 4K pages, 4-way associative, 512 entries.
Found unknown cache descriptors: dd
Total processor threads: 4
This system has 1 dual-core processor with hyper-threading (2 threads per core) running at an estimated 2.65GHz
Cir*_*郝海东 10
getconf
getconf -a | grep CACHE
给出：
LEVEL1_ICACHE_SIZE 32768
LEVEL1_ICACHE_ASSOC 8
LEVEL1_ICACHE_LINESIZE 64
LEVEL1_DCACHE_SIZE 32768
LEVEL1_DCACHE_ASSOC 8
LEVEL1_DCACHE_LINESIZE 64
LEVEL2_CACHE_SIZE 262144
LEVEL2_CACHE_ASSOC 8
LEVEL2_CACHE_LINESIZE 64
LEVEL3_CACHE_SIZE 20971520
LEVEL3_CACHE_ASSOC 20
LEVEL3_CACHE_LINESIZE 64
LEVEL4_CACHE_SIZE 0
LEVEL4_CACHE_ASSOC 0
LEVEL4_CACHE_LINESIZE 0
或者对于单个级别：
getconf LEVEL2_CACHE_SIZE
这个接口很酷的一点是它只是 POSIX sysconfC 函数的一个包装器（缓存参数是非 POSIX 扩展），因此它也可以从 C 代码中使用。
在 Ubuntu 16.04 中测试。
x86 CPUID 指令
CPUID x86 指令还提供缓存信息，用户可以直接访问：https : //en.wikipedia.org/wiki/CPUID
glibc 似乎对 x86 使用该方法。我还没有通过逐步调试/指令跟踪来确认，但 2.28 的源代码是sysdeps/x86/cacheinfo.c这样做的：
__cpuid (2, eax, ebx, ecx, edx);
TODO 创建一个最小的 C 示例，现在懒惰，在：https : //stackoverflow.com/questions/14283171/how-to-receive-l1-l2-l3-cache-size-using-cpuid-instruction-in-x86
ARM 还具有架构定义的机制，可通过缓存大小 ID 寄存器 (CCSIDR) 等寄存器查找缓存大小，有关概述，请参阅ARMv8 程序员手册11.6“缓存发现”。
内存大小
几种方法：
free
cat /proc/meminfo
sysinfo()
参考书目：
| 归档时间： |
|
| 查看次数： |
48856 次 |
| 最近记录： |