在VHDL中,我正在寻找一种方法来获取实体的两个整数参数,将一个作为浮点数除以另一个,然后找到该浮点比率的下限和上限,然后将其存储为vhdl 整型常量。
library ieee;
use ieee.std_logic_1164.all;
entity something is
generic(
N: natural := 4;
M: natural := 150
);
port(
sys_clk :in std_logic;
sys_rst :in std_logic;
datai :in std_logic_vector(M-1 downto 0);
datao :out std_logic_vector(N-1 downto 0)
);
end entity;
architecture rtl is something is
--how to calculate ceiling of M / N?
constant ratio_ceiling :integer := integer(real(M)/real(N));
--how to calculate floor of M / N?
constant ratio_floor :integer := integer(real(M)/real(N));
begin
end architecture;
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代码:
library ieee;
use ieee.std_logic_1164.all;
use ieee.math_real.all;
entity something is
generic(
N: natural := 4;
M: natural := 150
);
port(
sys_clk :in std_logic;
sys_rst :in std_logic;
datai :in std_logic_vector(M-1 downto 0);
datao :out std_logic_vector(N-1 downto 0)
);
end entity;
architecture rtl of something is
--how to calculate ceiling of M / N
constant ratio_ceiling :integer := integer(ceil(real(M)/real(N)));
--how to calculate floor of M / N
constant ratio_floor :integer := integer(floor(real(M)/real(N)));
begin
process
begin
report "ceil: " & integer'image(ratio_ceiling);
report "floor: " & integer'image(ratio_floor);
wait;
end process;
end architecture;
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输出:
C:\something> ghdl -a --std=08 --ieee=synopsys --work=work something.vhd
C:\something> ghdl --elab-run --std=08 --ieee=synopsys something --vcd=waves.vcd --ieee-asserts=disable
something.vhd:33:12:@0ms:(report note): ceil: 38
something.vhd:34:12:@0ms:(report note): floor: 37
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