没有规则来制定目标.o,为什么？

Question

这是我生命中的第一个makefile!我有一个项目中,我有SRC文件夹(在我把我的.cpp文件)中,包括文件夹(在我把我的.HPP文件)和构建中,我想我保存的目标文件夹.

 # define the C compiler to use
CCXX = g++ -std=c++11

# define any compile-time flags
CXXFLAGS = -g -Wall

# define any directories containing header files other than /usr/include
INCLUDES = -I./include

#define the directory for src files
SRCDIR = ./src/

#define the directive for object files
OBJDIR = ./build/

# define the C source files
SRCS = action.cpp conditionedBT.cpp control_flow_node.cpp execution_node.cpp main.cpp

# define the C object files 
OBJS = $(OBJDIR)$(SRCS:.cpp=.o)

# define the executable file 
MAIN = out

.PHONY: depend 

all: $(MAIN)
    @echo Program compiled

$(MAIN): $(OBJS) 
    $(CCXX) $(CXXFLAGS) $(INCLUDES) -o $(MAIN) $(OBJS)

$(OBJDIR)/%.o: ($SRCDIR)/%.c
    $(CCXX) $(CXXFLAGS) $(INCLUDES) -c -o $@ $<
#.c.o:
#   $(CC) $(CFLAGS) $(INCLUDES) -c $<  -o $@
#clean:
#   $(RM) *.o *~ $(MAIN)

depend: $(addprefix $(SRCDIR),$(SRCS))
    makedepend $(INCLUDES) $^

# DO NOT DELETE THIS LINE -- make depend needs it

鉴于上述情况,当我尝试执行make时出现以下错误:

make: *** No rule to make target `build/action.o', needed by `out'.  Stop.

Answer 1

你的问题有些问题Makefile.

1)您在使用.c文件时使用扩展名.cpp.

2)您的替换指令OBJS = $(SRCS:.c=.o)不考虑源和对象的子目录.

3)由于您没有指定源的子目录,因此不会因为这些原因而调用制作对象的一般规则.

因为这make是编制自己的规则来编译你的对象并忽略你所做的规则.

此外,我建议使用正确的隐式变量,C++这将使隐式规则更好地工作.

它们在此详述:https://www.gnu.org/software/make/manual/html_node/Implicit-Variables.html

所以我建议更像这样的东西:

# define the C compiler to use
CXX = g++ 

# define any compile-time flags
CXXFLAGS = -std=c++11 -g -Wall

# define any directories containing header files other than /usr/include
CPPFLAGS = -I./include

#define the directive for object files
OBJDIR = ./build
SRCDIR = ./src

# define the C source files
SRCS = $(SRCDIR)/action.cpp $(SRCDIR)/main.cpp

# define the C object files 
OBJS = $(patsubst $(SRCDIR)/%.cpp,$(OBJDIR)/%.o,$(SRCS))

# define the executable file 
MAIN = out

.PHONY: depend 

all: $(MAIN)
    @echo Program compiled

$(MAIN): $(OBJS) 
    $(CXX) $(CXXFLAGS) $(CPPFLAGS) -o $(MAIN) $(OBJS)

$(OBJDIR)/%.o: $(SRCDIR)/%.cpp
    @echo "Compiling: " $@
    $(CXX) $(CXXFLAGS) $(CPPFLAGS) -c -o $@ $<

clean:
    $(RM) $(OBJDIR)/*.o *~ $(MAIN)

depend: $(SRCS)
    makedepend $(INCLUDES) $^

# DO NOT DELETE THIS LINE -- make depend needs it