Makefile:没有规则来制作目标

Question

我有Makefile的问题.仅当.c文件已被修改时,它才应将.c文件编译为目标文件.但是当我使用all规则时出错:

make: *** No rule to make target `obj/main.o', needed by `ft_ls'.  Stop.

我手动使用它的工作原理:

clang -Wall -Wextra -Werror -Iinclude -o obj/main.o -c src/main.c

我的工作目录:

Makefile include/*.h  libft/libft.a    src/*.c

Makefile内容:

NAME = ft_ls
SRC_PATH = src
OBJ_PATH = obj
CPPFLAGS = -Iinclude
LDFLAGS = -Llibft
LDLIBS = -lft
CFLAGS = -Werror -Wall -Wextra
CC = clang
SRC_NAME = main.c\
     ft_type.c\
     ft_right.c\
     ft_putright.c\
     ft_date_converter.c
OBJ_NAME = $(SRC_NAME:.c=.o)
SRC = $(addprefix $(SRC_PATH)/,$(SRC_NAME))
OBJ = $(addprefix $(OBJ_PATH)/,$(OBJ_NAME))

all: $(NAME)

$(NAME): $(OBJ)
   $(CC) $(LDFLAGS) $(LDLIBS) $^ -o $@
   make -C libft

$(OBJ_PATH)%.o: $(SRC_PATH)%.c
   @mkdir $(OBJ_PATH) 2> /dev/null || true
   $(CC) $(CFLAGS) $(CPPFLAGS) -o $@ -c $<

clean:
   rm -fv $(OBJ)
   make -C libft clean
   @rmdir $(OBJ_PATH) 2> /dev/null || true

fclean: clean
   rm -fv $(NAME)
   make -C libft fclean

re: fclean all

.PHONY: all, clean, fclean, re

Answer 1

这个依赖行:

$(OBJ_PATH)%.o: $(SRC_PATH)%.c

$(OBJ_PATH)与对象名称连接,但有一个/缺失,应该是

$(OBJ_PATH)/%.o: $(SRC_PATH)/%.c

否则它会扩展(例如:for main):

objmain.o : srcmain.c